1. Field of the Invention
The present invention relates to a write operation of a nonvolatile semiconductor memory, for instance, a NAND type flash memory.
2. Description of the Related Art
A NAND type flash memory, in recent years, is used for various kinds of electronic devices while making the best use of its increased capacity and a nonvolatile property.
A cell unit of the NAND type flash memory is comprised a NAND string comprised a plurality of memory cells connected serially, and two select gate transistors each of which is connected to each end of the NAND string.
The memory cell has a stack gate structure consisting of a control gate electrode and a floating gate electrode. The control gate electrode of the memory cell is connected to a word line, while a gate electrode of the select gate transistor is connected to a select gate line.
A drain region arranged at one end of the cell unit is connected to a bit line, while a source region arranged at the other end is connected to a source line.
Then, at the time of write operation, a non-selected word line is made to be at a pass potential, while a selected word line is made to be at a write potential. A piece of write data (ground potential) is transferred from the selected bit line to a channel of a selected cell.
As a result, a high electric field is generated in a tunnel insulating film between the channel of the selected cell and the floating gate electrode, and electrons are injected in the floating gate electrode of the selected cell by FN (Fowler-Nordheim) tunneling phenomenon.
At this time, in the cell unit connected to the non-selected bit line, since two select gate transistors are in the OFF-state, when making the non-selected word line the pass potential, and making the selected word line the write potential, a channel potential of the memory cell constituting the NAND string increases.
Therefore, write for the non-selected cell in the cell unit connected to the non-selected bit line is inhibited in the state that the high electric field is not generated at the tunnel insulating film between the channel of the selected cell and the floating gate electrode.
However, in recent years, the NAND type flash memory of the memory cell is being increasingly miniaturized due to demands of increased memory capacity, which leads to a reduction in the distance between the select gate transistor and an adjacent memory cell.
Here, there is known a phenomenon that, in the cell unit connected to the non-selected bit line, a current based on an interband tunnel flow between a semiconductor substrate (well region) and a diffusion layer of the select gate transistor due to an increase in the channel potential.
The current generates hot electrons.
In the conventional NAND type flash memory, the distance between the select gate transistor and its adjacent memory cell is large. Thus, even though hot electrons are generated, sufficient energy is dissipated before the electrons reach the memory cell, therefore the hot electrons are not injected into the floating gate electrode.
To the contrary, in the NAND type flash memory in recent years, as described above, the distance between the select gate transistor and its adjacent memory cell is reduced, and thus the hot electrons reach the memory cell without loosing much energy.
For this reason, in the case where the selected cell being the object of write is adjacent to the select gate transistor, a wrong write is generated because the electrons are injected into the floating gate of the non-selected cell sharing the selected cell and the word line, in the cell unit connected to the non-selected bit line (refer to, for instance, “A New Programming Disturbance Phenomenon in NAND Flash Memory by Source/Drain Hot Electrons Generated by GIDL Current”, NON-VOLATILE SEMICONDUCTOR MEMORY WORKSHOP (NVSMW 2006)).
Incidentally, this problem occurs in a general nonvolatile semiconductor memory having a cell unit comprised a select gate transistor and memory cell, in addition to a NAND type flash memory.